Principal Engineer – Memory PHY / SerDes Architecture

Our client is seeking a highly technical Principal Engineer / Technical Lead with deep Memory PHY, SerDes PHY and mixed-signal design expertise . Important: This is not a hands-on circuit design position . The ideal candidate comes from a strong technical design background but is ready to provide broader architectural and technical leadership across PHY IP, SoC integration, SI/PI, validation and production What You’ll Own Technical ownership of third-party Memory/SerDes PHY and mixed-signal IP…